The present invention relates generally to semiconductor packages, and more particularly, to a surface mount semiconductor package having a novel lead configuration which facilitates a higher packing density than presently available semiconductor packages.
With reference now to FIG. 1, a conventional semiconductor package will now be described. More particularly, the conventional semiconductor package 7 includes a semiconductor chip 2 mounted on a leadframe pad 1. Electrical wires 4 are connected between chip bonding pads 2a and corresponding metal leads 9. The chip 2, the leadframe pad 1, and the wires 4 are fully encapsulated within a molded plastic body 5. The leads 9 are supported by means of internal portions 3 thereof which are fixed within the plastic body 5 at a location adjacent to the chip 2. The leads 9 each have an external portion 6 which is bent downwardly and outwardly to facilitate mounting of the package 7 to a printed circuit board (PCB) 8, e.g., by means of soldering.
Although the above-described conventional semiconductor package 7 has a relatively small footprint, the need for packages having even smaller footprints has arisen, in order to facilitate even higher packing densities of these components on PCBs. In this regard, the conventional semiconductor package 7 requires a mounting area on the upper surface of the PCB 8 which is greater than the outline (i.e., the width X length=surface area) of the molded plastic body 5, because the leads 9 have external portions 6 which extend laterally outwardly beyond the periphery of the plastic body 5. Thus, the lateral distance by which the external portions 6 of the leads 9 extend outwardly beyond the periphery of the plastic body 5 imposes a lower limit on the mounting area required for mounting the package 7 to the PCB 8. It is a primary object of the present invention to overcome this limitation.